1. Field of the Invention
The present invention relates generally to a data processing device, and more particularly, to a single chip data processing device with an embedded nonvolatile memory device and method thereof.
2. Description of the Related Art
A single chip data processing device, such as a system on chip (SOC) or a microcontroller unit (MCU), may comprise a processor, memory storage, and at least one of a plurality of peripheral devices. These peripheral devices may include a logic circuit, a voice and image processing circuit, and various interface circuits. The different elements comprising the single chip data processing device may contain a plurality of driving voltages.
For example, a conventional single chip data processing device manufactured by a super-0.35-μm CMOS process may include a high-voltage (15–20 V) driving PMOS transistor, an intermediate-voltage (4–6 V) driving PMOS transistor, and a low-voltage (1–3 V) driving PMOS transistor formed in an N-well, and a high-voltage driving NMOS transistor (15–20 V), an intermediate-voltage driving NMOS transistor (4–6 V), and a low-voltage driving NMOS transistor (1–3 V) formed in a P-well.
Further, a high-voltage driving NMOS transistor requiring a low threshold voltage VTH may be formed on a p-type substrate. Variation of the threshold voltage VTH may occur due at least to a body effect. The body effect may be overcome to a degree by having the transistors of a cell of an electrically erasable and programmable read-only memory (EEPROM), which is a nonvolatile memory device, formed on a low-concentration p-type substrate.
Decreasing the fabricated size of electronic devices has led to many gains in performance. For this reason, sub-0.18-μm CMOS processes have recently been proposed. However, since the transistors of the EEPROM cell are conventionally formed on the low-concentration p-type substrate, a reduction in the cell size may lead to a short channel effect. The short channel effect is the increase of a threshold voltage due to a decreased channel length. This rise in voltage may lead to a punch-through effect. The punch-through effect refers to a current too high for a transistor to block.
Further, the formation of the PMOS transistors containing various driving voltages are formed in the N-well, and the NMOS transistors which have various driving voltages are formed in the P-well. Therefore, each of the transistors may not exhibit optimal operating characteristics at the same time as another transistor with a different driving voltage in the same well.